//-----------------------------------------------------------------------------
//  Copyright (c) 2013 by HangZhou HenqgQiao Design Corporation. All rights reserved.
//
//  Project  : 
//  Module   : 
//  Parent   : 
//  Children : 
//
//  Description: 
//
//  Parameters:
//  Local Parameters:
//
//  Notes       : 
//
//  Multicycle and False Paths

module AUPP_FFRD(
   input                                GTM_RESET,
   input                                GTM_CLK155M52,
   input                                GTM_RCLK


   input                                FRM_IN_FP8K,
   input[63:0]                          FRM_IN_DATA,

   output                               AUPP_OUT_FP8K,
   output[63:0]                         AUPP_OUT_DATA,
   output                               AUPP_OUT_SPE,
   output                               AUPP_OUT_J1
   );

// ++++++++++++++++++                 AUPP Modules                        ++++++++++++++++++ //
reg[15:0]                               aupp_rf_cnt;
reg                                     aupp_rfp8k;

always @( posedge GTM_CLK155M52 ) begin
   if ( aupp_rf_cnt[15:0]==16'd19439 )
      aupp_rf_cnt[15:0]               <= 16'd0;
   else
      aupp_rf_cnt[15:0]               <= aupp_rf_cnt[15:0]+ 16'd1;
end
always @( posedge GTM_CLK155M52 ) begin
   aupp_rfp8k                         <= aupp_rf_cnt[15:0]==16'd0; 
end

AUPP8_TOP                             INST_0_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[63:56] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_0_fp ),
   .j1_pr_out                         ( aupp_0_j1 ),
   .spe_pr_out                        ( aupp_0_spe ),
   .data_pr_out                       ( aupp_0_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_1_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[55:48] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_1_fp ),
   .j1_pr_out                         ( aupp_1_j1 ),
   .spe_pr_out                        ( aupp_1_spe ),
   .data_pr_out                       ( aupp_1_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_2_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[47:40] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_2_fp ),
   .j1_pr_out                         ( aupp_2_j1 ),
   .spe_pr_out                        ( aupp_2_spe ),
   .data_pr_out                       ( aupp_2_data ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_3_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[39:32] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_3_fp ),
   .j1_pr_out                         ( aupp_3_j1 ),
   .spe_pr_out                        ( aupp_3_spe ),
   .data_pr_out                       ( aupp_3_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_4_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[31:24] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_4_fp ),
   .j1_pr_out                         ( aupp_4_j1 ),
   .spe_pr_out                        ( aupp_4_spe ),
   .data_pr_out                       ( aupp_4_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_5_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[23:16] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_5_fp ),
   .j1_pr_out                         ( aupp_5_j1 ),
   .spe_pr_out                        ( aupp_5_spe ),
   .data_pr_out                       ( aupp_5_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_6_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[15:8] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_6_fp ),
   .j1_pr_out                         ( aupp_6_j1 ),
   .spe_pr_out                        ( aupp_6_spe ),
   .data_pr_out                       ( aupp_6_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);

AUPP8_TOP                             INST_7_AUPP8_TOP(
   .reset                             ( GTM_RESET ),
   .clk155m_sys                       ( GTM_CLK155M52 ),
   .rx_clk155m                        ( GTM_RCLK ),

	//******
   .fp_in                             ( FRM_IN_FP8K ),
   .data_in                           ( FRM_IN_DATA[7:0] ),

   .fp_pi_out                         (  ),
   .j1_pi_out                         (  ),
   .spe_pi_out                        (  ),
   .data_pi_out                       (  ),

	//******
   .fp_ppfa_regen                     ( aupp_rfp8k ),

   .fp_pr_out                         ( aupp_7_fp ),
   .j1_pr_out                         ( aupp_7_j1 ),
   .spe_pr_out                        ( aupp_7_spe ),
   .data_pr_out                       ( aupp_7_data[7:0] ),

	//******
   .hp_fifo_ovf_1                     ( ),
   .hp_fifo_ovf_2                     ( ),
   .hp_fifo_ovf_3                     ( ),
   .hp_fifo_ovf_4                     ( ),
   .ptr_itpre_st1                     ( ),
   .ptr_itpre_st2                     ( ),
   .ptr_itpre_st3                     ( ),
   .ptr_itpre_st4                     ( ),
   .ptr_itpre_st5                     ( ),
   .ptr_itpre_st6                     ( ),
   .ptr_itpre_st7                     ( ),
   .ptr_itpre_st8                     ( ),
   .ptr_regen_st                      ( ),
   .h1_pos_y1                         ( )
	);


wire                              auloop_fp;
(* keep = "TRUE" *) wire[63:0]                        auloop_data;
(* keep = "TRUE" *) reg[2:0]                          auloop_fcnt8;
(* keep = "TRUE" *) reg[8:0]                          auloop_fcnt270;
(* keep = "TRUE" *) reg[3:0]                          auloop_fcnt9;

always @( posedge GTM_CLK155M52 ) begin
   if ( auloop_fp==1'b1 )
      auloop_fcnt8[2:0]                                <= 3'd1;
   else begin
      auloop_fcnt8[2:0]                                <= auloop_fcnt8[2:0] +3'd1;
   end
end
always @( posedge GTM_CLK155M52 ) begin
   if ( auloop_fp==1'b1 )
      auloop_fcnt270[8:0]                              <= 9'd0;
   else if ( auloop_fcnt8[2:0]==3'd7 ) begin
      if ( auloop_fcnt270[8:0]==9'd269 )
         auloop_fcnt270[8:0]                           <= 9'd0;
      else
         auloop_fcnt270[8:0]                           <= auloop_fcnt270[8:0] +9'd1;
   end
end
always @( posedge GTM_CLK155M52 ) begin
   if ( auloop_fp==1'b1 )
      auloop_fcnt9[3:0]                                <= 4'd0;
   else if ( auloop_fcnt8[2:0]==3'd7 && auloop_fcnt270[8:0]==9'd269 ) begin
      if ( auloop_fcnt9[3:0]==4'd8)
         auloop_fcnt9[3:0]                             <= 4'd0;
      else
         auloop_fcnt9[3:0]                             <=auloop_fcnt9[3:0]  +4'd1;
   end
end

  assign auloop_fp                  = aupp_0_fp;
  assign auloop_data[63:56]         = aupp_0_data[7:0];
  assign auloop_data[55:48]         = aupp_1_data[7:0];
  assign auloop_data[47:40]         = aupp_2_data[7:0];
  assign auloop_data[39:32]         = aupp_3_data[7:0];
  assign auloop_data[31:24]         = aupp_4_data[7:0];
  assign auloop_data[23:16]         = aupp_5_data[7:0];
  assign auloop_data[15:8]          = aupp_6_data[7:0];
  assign auloop_data[7:0]           = aupp_7_data[7:0];

OH_TSOH               INST_OH_TSOH(
   .RESET             ( RESET ),
   .TCLK_155M         ( GTM_CLK155M52 ),

   .MPI_TXJ0_DATA     (  ),
   .MPI_TXJ0_MODE     (  ),
   .MPI_TXK1K2        (  ),
   .MPI_TXS1          (  ),
   .MPI_TX_SOH_LOOP_EN(  ),
   .RSOH_B2_CNT       (  ),
   
   .DBIN_TDATA        ( auloop_data[63:0] ),
   .DBIN_FCNT8        ( auloop_fcnt8[2:0] ),
   .DBIN_FCNT270      ( auloop_fcnt270[8:0] ),
   .DBIN_FCNT9        ( auloop_fcnt9[3:0] ),
   .DBIN_MFCNT64      (  ),

   .TSOH_TDATA        ( oh2frm_tdata[63:0] ),
   .TSOH_FCNT8        ( oh2frm_fcnt8[2:0] ),
   .TSOH_FCNT270      ( oh2frm_fcnt270[8:0] ),
   .TSOH_FCNT9        ( oh2frm_fcnt9[3:0] ),
  // data bus from receive side, used for SOH loop
   .RX_RCLK155M       (  ),
   .RX_DBIN_FAS_FAIL  (  ),
   .RX_DBIN_FCNT8     ( ),
   .RX_DBIN_FCNT270   (  ),
   .RX_DBIN_FCNT9     ( ),
   .RX_DBIN_DATA      (  )
   );



  assign AUPP_OUT_FP8K                = aupp_0_fp;
  assign AUPP_OUT_DATA[63:56]         = aupp_0_data[7:0];
  assign AUPP_OUT_DATA[55:48]         = aupp_1_data[7:0];
  assign AUPP_OUT_DATA[47:40]         = aupp_2_data[7:0];
  assign AUPP_OUT_DATA[39:32]         = aupp_3_data[7:0];
  assign AUPP_OUT_DATA[31:24]         = aupp_4_data[7:0];
  assign AUPP_OUT_DATA[23:16]         = aupp_5_data[7:0];
  assign AUPP_OUT_DATA[15:8]          = aupp_6_data[7:0];
  assign AUPP_OUT_DATA[7:0]           = aupp_7_data[7:0];

  assign AUPP_OUT_SPE[7]              = aupp_0_spe;
  assign AUPP_OUT_SPE[6]              = aupp_1_spe;
  assign AUPP_OUT_SPE[5]              = aupp_2_spe;
  assign AUPP_OUT_SPE[4]              = aupp_3_spe;
  assign AUPP_OUT_SPE[3]              = aupp_4_spe;
  assign AUPP_OUT_SPE[2]              = aupp_5_spe;
  assign AUPP_OUT_SPE[1]              = aupp_6_spe;
  assign AUPP_OUT_SPE[0]              = aupp_7_spe;

  assign AUPP_OUT_J1[7]               = aupp_0_j1;
  assign AUPP_OUT_J1[6]               = aupp_1_j1;
  assign AUPP_OUT_J1[5]               = aupp_2_j1;
  assign AUPP_OUT_J1[4]               = aupp_3_j1;
  assign AUPP_OUT_J1[3]               = aupp_4_j1;
  assign AUPP_OUT_J1[2]               = aupp_5_j1;
  assign AUPP_OUT_J1[1]               = aupp_6_j1;
  assign AUPP_OUT_J1[0]               = aupp_7_j1;

endmodule
